In the field of power electronics, high-voltage semiconductor devices (power devices) are used to which a high voltage is applied.
There has been known a vertical power device structure in which a large current can be applied easily and further a high-voltage resistance and a low on-resistance can be ensured easily (for example, see Patent Literature 1).
Such a vertical power device includes, for example, an n+ type substrate, an n− type epitaxial layer laid on the substrate, a p type body region formed in a surficial portion of the epitaxial layer, and an n+ type source region formed in a surficial portion of the body region. A gate insulating film is such that it extends across the surface of the epitaxial layer outside the body region, the surface of the body region, and the surface of the source region. A gate electrode is then formed on the gate insulating film. A source electrode is connected electrically to the source region. A drain electrode is formed on the back surface of the substrate. The vertical power device is thus formed in which the source electrode and the drain electrode are arranged vertically, that is, perpendicularly to the principal surface of the substrate.
When a voltage equal to or higher than a threshold value is applied to the gate electrode while a source-drain voltage is applied between the source electrode and the drain electrode, an electric field on the gate electrode forms a channel in the vicinity of the interface with the gate insulating film in the body region. This causes a current to flow between the source electrode and the drain electrode and thus the power device to turn on.